1. Field of the Invention
The present disclosure relates to a method of forming a semiconductor circuit element and to a semiconductor circuit element, and, more particularly, to forming a semiconductor circuit element in a gate-last process.
2. Description of the Related Art
In modern electronic equipment, integrated circuits (ICs) experience a vast applicability in a continuously spreading range of applications. Particularly, the demand for increasing mobility of electronic devices at high performance and low energy consumption drives developments to more and more compact devices having features with sizes ranging even into the deep submicron regime; the more so as current semiconductor technologies are apt of producing structures with dimensions in the magnitude of 10 nm. With ICs representing a set of electronic circuit elements integrated on a semiconductor material, normally silicon, ICs can be made much smaller than discreet circuits composed of independent circuit components. The majority of present-day ICs are implemented by using a plurality of circuit elements, such as field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs or simply MOS transistors), and passive elements, such as resistors and capacitors, integrated on a semiconductor substrate with a given surface area. Typically, present day integrated circuits involve millions of single circuit elements formed on a semiconductor substrate.
The basic function of a MOSFET is that of an electronic switching element, wherein a current through a channel region between two contact regions, referred to as source and drain, is controlled by a gate electrode to which a voltage relative to source and drain is applied. Particularly, in applying a voltage exceeding a characteristic voltage level to the gate electrode, the conductivity state of a MOSFET is changed and the characteristic voltage level, usually called “threshold voltage” and in the following referred to as Vt, characterizes the switching behavior of a MOSFET. In general, Vt depends nontrivially on the transistor's properties, e.g., materials, dimensions etc., such that the implementation of a desired Vt involves plural steps of adjustment and fine-tuning during the fabrication process.
Currently, the most common digital integrated circuits built today use CMOS logic, which is fast and offers a high circuit density and low power per gate. CMOS or “complementary symmetry metal oxide semiconductor,” as it is sometimes referred to, makes use of complementary and symmetrical pairs of P-type and N-type MOSFETs for implementing logic functions. Two important characteristics of CMOS devices are the high noise immunity and low static power consumption of a CMOS device because the series combination of complementary MOSFETs in a CMOS device draws significant power only momentarily during switching between on- and off-states, since one transistor of a CMOS device is always in the off-state. Consequently, CMOS devices do not produce as much waste heat as other forms of logic, for example, transistor-transistor logic (TTL) or NMOS logic, which normally have some standing current even when not changing state. In current CMOS technologies, standard transistors and IO devices have the same high-k dielectric and metal electrode, whereas, in comparison with standard devices, the SiO2 oxide of IO devices is thicker.
In efforts to improve memory arrays, ferroelectric gate field effect transistors (FeFETs) have been recently in the focus of research. In general, ferroelectrics are dielectric crystals which show a spontaneous electric polarization, similar to ferromagnetic materials showing a spontaneous magnetization. Upon applying an appropriate external electric field to a ferroelectric material, the direction of polarization may be reoriented. The basic idea is to use the direction of spontaneous polarization in ferroelectric memories for storing digital bits. In FeFETs, the effect that one makes use of is the possibility to adjust the polarization state of a ferroelectric material on the basis of appropriate electrical fields which are applied to the ferroelectric material which, in a FeFET, is usually the gate oxide. Since the polarization state of a ferroelectric material is preserved unless it is exposed to a high, with regard to the polarization state, counter-oriented electrical field or a high temperature, it is possible to “program” a capacitor formed of ferroelectric material such that an induced polarization state reflects an information unit. Therefore, an induced polarization state is preserved, even upon removing an accordingly “programmed” device from a power supply. In this way, FeFETs allow the implementation of non-volatile electrically-switchable data storage devices.
Though a FeFET or a ferroelectric capacitor represent, in theory, very promising concepts for complex semiconductor devices, it is a difficult task to identify appropriate ferroelectric materials which are compatible with existing advanced manufacturing processes of complex devices, particularly at very small scales. For example, commonly-known ferroelectric materials, such as PZT or perovskites, are not compatible with standard CMOS processes. Hafnium (Hf) materials which are used in current fabrication technologies exhibit a paraelectric behavior due to the predominantly monoclinic crystal structure of HfO2. However, recent research results indicate that hafnium oxide-based dielectric materials may represent promising candidates for materials with ferroelectric behavior to be used in the fabrication of ferroelectric semiconductor devices of ICs because recent results suggest that the monoclinic structure is suppressed in Zr, Si, Y and Al-doped hafnium oxide materials and stabilized crystal structures of ferroelectric nature were obtained in accordingly-doped samples.
In view of the above-described situation, it is, therefore, desirable to integrate a full functional FeFET device into a CMOS technology based on replacement metal gate processes.